Glossary of Acronyms

A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

SCSI - Small Computer System Interface. This is a multidevice, chained interface used in many devices such as harddisk drives and CD-ROM drives. SCSI is a bus. In the SCSI architecture, the PC (or more precisely, the SCSI adapter card in the PC) is just one device on the bus. In the classic SCSI bus, there are 25 signals, each represented by a pair of wires (50 wires all together). Nine of the wires hold the eight bits plus parity of a byte of data. The other wires carry control functions. Classic SCSI can transfer data up to 5 megabytes per second. The fast SCSI option of the SCSI-2 standard allows 10 megabytes per second on the same cable.. SCSI devices can be internal or external to the computer. SCSI disks are available up to 9 gigabytes of storage. Therefore, they are normally used on servers.

Based on an original design by Shugart Associates, SCSI is not specifically a drive interface, but a method of allowing different devices to communicate with the PC. For hard drives the entire controller unit is built onto the drive PCB, allowing for very high speed transfers of data to and from the drive. Fully interpreted, parallel data is then transferred to and from the PC by way of a single cable through a bus interface that has configured the device as a hard drive.

SDRAM - Synchronous Dynamic Random Access Memory. DRAM that uses a separate clock to synchronize and coordinate data transfers with the processor for extra performance. SDRAM takes memory access away from the CPU's control. Internal registers in the chips accept the request, and let the CPU do something else while the data requested is assembled for the next time the CPU talks to the memory. As they work on their own clock, the rest of the system can be clocked faster. There is a version optimized for video cards.

SEC - Single Edge Connect Cartridge. Intel's package for the Pentium II processor which plugs into a connector called Slot 1 on the motherboard. The SEC uses only 242 pins as opposed to the 387 in the Socket 8 PGA. The SEC cartridge in-line pin arrangement dramatically improves circuit routing, which lets designers employ less expensive four layer boards.

SIMD - Single Instruction Multiple Data. The basis for Intel's new MMX technology that allows many pieces of information to be processed with a single instruction, providing parallelism that greatly increases performance.

SIMM - Single Inline Memory Module. DRAM is typically packaged on small boards called SIMMs. Each memory location on a SIMM holds 8 bits of data (a byte), and usually an extra bit to serve as a parity error check. SIMMs come in 30 and 72 pin varieties, although he 30 pin type have become obsolete with the introduction of the 486 chip. Modern PC's are designed for the larger 72 pin SIMM. The additional pins allow each SIMM to deliver four bytes of data (Plus parity) in every memory request. Pentium system, and less common RISC computers, are based on a 64 bit (* byte) data interface. To support this requirement, the 72 pin SIMMs must be installed in matching pairs. The newer machines are using non parity SIMM as opposed to parity type with error checking.

SIMMS are rated by speed in terms of nano seconds (ns), or the time between clock cycles. The lower the ns the higher the speed. It is best to use the fastest speed. NS ratings range from as low as 45 ns to as high as 70 ns or greater. 60 and 70 ns are the most common. SIMMS should be bought and installed so the metal on their contacts matches the bracket metal on the motherboard. Dissimilar metals should not be mixed. Gold to gold, lead to lead, and tin to tin.

SIMMS capacities are referred to as such: 1M x 32 (32 bits or 4 bytes) = 4 MB for non parity; or 1M x 36 (36 bits or 4 bytes plus 1 extra parity bit for each byte) = 4 MB for parity. Other combinations would be:

Non Parity

2M x 32 = 8MB x 2 = 16MB (Total)

4M x 32 = 16MB x 2 = 32MB (Total)

8M x 32 = 32MB x 2 = 64MB (Total)

16M x 32 = 64MB x 2 = 128MB (Total)

32M x 32 = 128MB x 2 = 256 MB (Total)

Parity

2M x 36 = 8MB x 2 = 16MB (Total)

4M x 36 = 16MB x 2 = 32MB (Total)

8M x 36 = 32MB x 2 = 64MB (Total)

16M x 36 = 64MB x 2 = 128MB (Total)

32M x 36 = 128MB x 2 = 256 MB (Total) 

SMART - Self Monitoring, Analysis, and Reporting Technology. A hard disk drive standard pioneered by Compaq designed to improve overall reliability, accurately forecast failure, and allow for prefailure mitigation of the hard disk drive. SMART has on-drive sensing hardware to report drive status, plus optional software to receive and interpret that data. Supported by a consortium of vendors including Connor, Seagate, Quantum, Western Digital, IBM, and Cheyenne.

SMM - System Management Mode. A special mode on x86 processors that is more privileged than protected mode. It is often used for power management.

SMP - Symmetric Multiprocessing. The use of two or more CPU's on the computer mainboard. Originally used in network servers to speed up and expand the computing power of the server. SMP is now being applied to desktop and other stand alone machines.

SMP employs multiple processors in a parallel configuration, but still appears to be a singular memory area to the application software. This lets the memory always appear local, which allows for faster data transfer, but breaks down when the system is scaled too large. When more processors are connected in most SMP systems, the small number of input/output channels limits the speed of data access.

Typically in an SMP system, there is a high speed backplane, or bus, that interconnects all the system components, including processors. Each processor usually has its own memory, cache or caches, and I/O controllers. The bus will have a fixed available bandwidth shared by all the system's components. This design has scalability limitations. As individual processor types get faster or greater in number, they demand more bus and memory bandwidth, thus letting the same SMP bus support fewer and fewer processors. In addition, I/O bandwidth comes from the same pool, which reduces the number of processors as the I/O demand increases.

SMPTE - Society of Motion Picture and Television Engineers. The SMPTE time code is a standard used to identify individual video frames in the video editing process. SMPTE time code controls such functions as play, record, rewind, and forward of video tapes. SMPTE time code displays video in terms of hours, minutes, seconds, and frames for accurate video editing.

SNR - Signal To Noise Ratio. A measure of link performance arrived at by dividing signal power by noise power. Typically measured in decibels. The higher the ratio, the clearer the connection.

SPEC - System Performance Evaluation Cooperative. A set of benchmarks for workstation applications. Integer performance is reported as SPECint92 and floating point performance as SPECfp92.

SRAM - Static Random Access Memory. SRAM is the fastest available, with a typical access time of 25 nanoseconds. Static RAM is expensive and can only store a quarter of the data that DRAM is able to, as it uses two transistor to store a bit against DRAM's one, although it does retain it for as long as the chip is powered. The transistors are connected so that only one is either in or out at any time; whichever one is in stands for a 1 bit. Synchronous SRAM allows a faster data stream to pass through it; which is needed when used for caching on 90 and 100 MHz Pentium.

A form of high-speed memory. SRAM chips do not require a refresh cycle like Dynamic RAM chips and can be made to operate at very high access speeds. SRAM chips are very expensive because they normally require 6 transistors per bit. This also makes the chip larger than conventional dynamic RAM chips. SRAM is volatile, meaning it will lose data with no power.  A smaller amount of memory that may be added to a system as an external or second level cache. SRAM is faster memory than DRAM.

RAM which typically consists of one flip-flop per bit of memory. Unlike DRAMs, static RAM retains its contents as long as power is applied. Because there is no need to refresh the contents of memory addresses which are read, SRAM is faster than DRAM, but it is more expensive and typically is available in much smaller sizes than DRAM because each bit occupies more space on the chip. See also DRAM.

ST-506/412 A hard disk interface invented by Seagate Technology and introduced in 1980 with the ST-506 SM hard drive. The ST-506 interface requires that the read/write head be stepped or moved across the disk one track at a time by carefully timed pulses. Because these pulses cause the read/write head's stepper motor to advance a notch, they cannot be sent faster than the disk drive can move the heads. The ST-412 interface introduced with the ST-412 10M drive adds buffered seeking, which eliminates this problem. Instead of requiring the controller to slow the pulse rate to whatever the mechanism can handle, ST-412 simply counts the pulses as they come in and then decides how far to step the head to move the required number of tracks. ST-506/412 was formerly the interface of choice for IBM compatible systems but has since been superseded by the ESDI, IDE, and SCSI interfaces.

Standard interface used on XT and AT drives and controllers. Originally developed by Seagate Technologies to support their ST 506 (5 MB) and ST412 (10 MB) drives. The entire controller mechanism is located on a controller card and communications between the drive and the controller flow over 2 ribbon cables, one for drive control and one for data.

SVGA - Super Video Graphics Array. The most popular video standard for monitors and video control cards that support resolutions up to 1,024 by 768 pixels on the CRT screen and up to 16.7 million colors simultaneously.

SX. The computer in the 80386 series with a 32 bit bus structure which contained no math coprocessor.

A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

Compiled by Scott McArdle, MagnaCom Limited. I hope this list has helped you and if there is an item that should be on this list, please let me know. Thanks. PS, I've spent 100's of hours maintaining this list, please don't be a LAMER.