Glossary
of Acronyms
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- Integrated Circuit. A chip.
ICache - Instruction Cache. Part of the
L1 or Primary Cache. A fast local memory that
holds the instructions to be executed. When a
program tries to access an instruction that is
not yet in the cache, the CPU must wait until
hardware fetches the desired instruction from
another cache, or memory itself down stream. These
stalls in the fetch/decode unit of the Pentium
Pro Processor are typically overlapped by the
other units that are processing independently.
IDE - Integrated Disk Electronics. A type
of hard disk technology pioneered by Compaq and
Conner that embedded a controller onto the hard
disk PCB (Printed Circuit Board) while maintaining
computability with the register level commands
sent by the computer's INT 13 routines. IDE drives
are configured and appear to the computer like
standard ST506 drives . IDE is the least expensive
technology with support usually built into the
mainboard. An IDE disk is connected to the mainboard
or interface card through a flat ribbon cable.
Rather than invent a new interface, the signals
in the IDE cable simply duplicate the activity
on the ISA bus itself. Classic IDE supported two
harddisks of 528 megabytes or less. An IDE interface
cable has two plugs that can be attached to the
two disks. Also known as ATA.
INT13 - A basic BIOS subroutine
that controls the function and configuration of
the hard disk drive. Continued reliance on the
unchanged INT13 routine inherently creates certain
hard drive limiting factors, including a problem
with more than two hard drives and BIOS/OS limits
to recognizing more than 1024 cylinders, 16 heads,
and 63 sectors per track. This creates the so
called 504 MB barrier since a sector holds only
512 bytes. As calculated:
1024 (Cylinders) X 16 (Heads) X 63 (Sectors/Track)
X 512 (Bytes/Sector) = 528,482,304 Bytes
I/O - Input/Output. This is an abbreviation
for input/output, which applies to any communication
activity both inside and outside the computer.
Same as the Bus, or a common set of wires that
connect the computer devices and chips together.
Some of these wires are used to transmit data,
some send housekeeping signals, like the clock
pulse, and some transmit numbers (the address)
that identifies a particular device or memory
location. The bus speed is determined by the clock
speed or cycles per second.
IPL - Initial Program Load. Another term
for the Bootstrap Loader Program where the BIOS
code tells the microprocessor to jump to the section
of code that tells the chip how to read the first
sector on the disk.
IrDA - Infrared. A type of port available
on Pentium systems that allows the transfer of
files to and from portable devices such as laptops
through transmitters and receivers.
IRP - I/O Request Packet. Data structures
that drivers sue to communicate with each other.
IRQ - Interrupt Request Lines. Hardware
lines over which devices can send signals to get
the attention of the processor when the device
is ready to accept or send information. Typically,
each device connected to the computer uses a separate
IRQ. The most important difference between the
CPU/Memory local bus and the I/O bus is the presence
of IRQ wires. The I/O bus has 15 separate IRQ
wires. When a device generated an interrupt, the
CPU hardware stops running an ordinary program
and jumps to an interrupt handling routine in
the device driver. The interrupt may signal that
a previous request is complete and the device
can now start a new request, that data has arrived
that needs to be read, or that an error has been
detected on an idle device. Any device on the
I/O bus can request an interrupt by placing a
signal on one of the 15 IRQ wires. If more than
one IRQ signal is received at the same time, the
chip set on the mainboard has to select the one
with the highest priority to process first. The
CPU is interrupted (by sending a signal on its
one wire) and the chip set then transfers the
identity of the IRQ level to be processed. Each
IRQ wire goes to every slot in the I/O bus. An
adapter card is configured (physically with switches
or logically with a utility) to use a specific
IRQ value. The newer bus architectures, such as
MCA, EISA, and PCI, use circuitry that allows
two devices to share the same interrupt.
Physical connections between external hardware
devices and the interrupt controllers. When a
device such as a floppy controller or a printer
needs the attention of the CPU, an IRQ line is
used to get the attention of the system to perform
a task. On PC and XT IBM-compatible systems, 8
IRQ lines, numbered IRQ 0 through IRQ7 are included.
On the AT and PS/2 systems, 16 IRQ lines are numbered
IRQ 0 through IRQ 5. IRQ lines must be used only
by a single adapter in the ISA bus systems, but
Micro Architecture (MCA) adapters can share interrupts.
ISA - Industry Standard Architecture. A
type of computer bus design or architecture of
the IBM PC/AT. An ISA bus is a 16 bit interface
that runs at 8 MHz. The 8-bit version came on
the original PC and the AT, but the latter uses
an extension to make it 16-bit. It has a maximum
data transfer rate of about 8 megabits per second
on an AT, which is actually well above the capability
of disk drives, or most network and video cards.
The average data throughput is around a
quarter of that. Its design makes it difficult
to mix 8- and 16-bit RAM or ROM within the same
128K block of upper memory; an 8-bit VGA card
could force all other cards in the same (C000-DFFF)
range to use 8 bits as well, which was a common
source of inexplicable crashes where 16-bit network
card were involved.
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Compiled by Scott
McArdle, MagnaCom Limited. I hope this list
has helped you and if there is an item that should
be on this list, please let me know. Thanks. PS,
I've spent 100's of hours maintaining this list,
please don't be a LAMER.
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